register-level control, hardware timers, interrupts, fixed-point logic, and deterministic scheduling.
embedded control / real-time firmware / quantum algorithms
kuku dompreh
embedded systems engineer buildingdeterministic control systems
computer systems engineering at warwick, focused on physical electronics, real-time firmware, telemetry, and quantum hardware-aware algorithm workflows.
currently building embedded control systems and researching quantum algorithm workflows.
latency μs-level
timing hardware timers
bus spi / uart
mode closed-loop
featured build
real-time deterministic control system
bare-metal c++ firmware stack with hal, cooperative scheduling, adc capture, pid control, and uart telemetry.
research directionalgorithmic system modelling
pqc simulation workflows and hardware-efficient gate mapping for generative data sampling.
latest signal2026 build log
research award, warwick quantum computing group momentum, and embedded control platform progress.
about
engineering where firmware meets physical systems.
my work is centred on deterministic systems: firmware that talks directly to registers, control loops that respect real timing constraints, and research that maps algorithms toward hardware limits.
currently
download cv
building embedded control systems and researching quantum algorithm workflows.
i’m a computer systems engineering student at the university of warwick, building toward embedded control and quantum hardware-facing systems. i’m drawn to projects where physics, code, and architecture all have to agree: signal acquisition, scheduling, telemetry, feedback, and performance constraints.
the part i enjoy most is turning noisy physical behaviour into predictable software decisions without pretending the hardware is infinite.
sensor/data movement across peripheral buses, serial telemetry, and hardware-software debug loops.
closed-loop feedback, state machines, measurement pipelines, and tuning workflows.
algorithm simulation, circuit design constraints, gate-depth awareness, and sampling workflows.
technical interests
- real-time firmware
- hardware-aware algorithms
- telemetry and instrumentation
- quantum circuit workflows
modules
- computer organisation and architecture
- electrical and electronic circuits
- systems modelling and simulation
tools and equipment
- oscilloscopes
- logic analysers
- multimeters
- platformio
- git
preferred problems
- deterministic scheduling
- telemetry
- control loops
- hardware-aware algorithms
meng computer systems engineering
university of warwick, with focus across computer architecture, circuits, systems modelling, and simulation.
pathway undergraduate research scholarship
independent research direction in quantum algorithms for sample generation and parametrised quantum circuits.
machine learning intern — wmg
hybrid hardware-software workflows for qaoa, gate-depth optimisation, and nisq execution constraints.
latest
recent builds, notes, and system logs.
filtered progress snapshots across embedded systems, research, and community work.
projects
systems built from signal to software.
project cards open into detailed technical views with architecture notes, diagrams, repository links, and engineering constraints.
research
formal notes on hardware-efficient algorithms.
technical writeups use expandable panels for objectives, methods, results, next experiments, diagrams, and glossary support.
contact
direct channels.
for embedded systems work, research collaborations, internships, or technical conversations, contact me directly through email, linkedin, or github.
availability
open to embedded systems, research, and internship conversations.
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hidden lab
experimental interface layer.
prototype interactions for signal visualisation, shortcut-driven navigation, and personal lab notes.
pid tuner mock
visualise kp/ki/kd changes against a synthetic sensor curve.
logic analyser skin
minimal waveform view inspired by embedded debugging sessions.
quantum circuit cards
compact gate-sequence previews for algorithm writeups.